1. Field of the Invention
The present invention generally relates to a delta-sigma modulator, and more particularly to a delta-sigma modulator with a digitally-assisted compensation filter.
2. Description of Related Art
A delta-sigma (ΔΣ) modulator or sigma-delta (ΣΔ) modulator is a feedback system that produces high-resolution signals through simple circuit blocks. The delta-sigma modulator is widely adapted to electronic circuits such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs) or frequency synthesizers, and is highly attractive in wireless communications due to its simplicity and low-power consumption.
FIG. 1A shows a mathematical model of an ideal continuous-time (3rd order) delta-sigma modulator, indicating A1, A2 and A3 feedback DAC coefficients, fs sampling frequency, X(s) input signal, E(z) quantization noise, and Y(z) output code. However, loop delay exists in the feedback path for a real circuit environment. The loop delay causes the shift of the pole of the modulator system, and thus alters the original noise-transfer-function (NTF) of the modulator. In order to resolve this issue, an analog compensation path kf is added as shown in FIG. 1B, where Td is the loop delay, and k1, k2, and k3 are feedback DAC coefficients with consideration for the loop delay.
Nevertheless, the addition of the analog compensation path kf disadvantageously increases additional power consumption, and also increases distortion from the additional analog circuit.
As a consequence of the conventional analog compensation path not being able to effectively solve the excess-loop delay issue, a need has arisen to propose a novel scheme that is capable of resolving the excess-loop delay issue by the replacement of analog circuitry with a precise digital circuit.